By Francky Catthoor, Lars Svensson, Klaus Wölcken (auth.), Francky Catthoor, Lars Svensson (eds.)
Application-Driven structure Synthesis describes the state-of-the-art of architectural synthesis for complicated real-time processing.
on the way to take care of the stringent timing specifications and the intricacies of complicated real-time sign and knowledge processing, objective structure kinds and goal program domain names were followed to make the synthesis process possible. those techniques also are seriously application-driven, that is illustrated by means of many lifelike demonstrations, used as examples within the book.
the focal point is on domain names the place application-specific ideas are beautiful, reminiscent of major components of audio, telecom, instrumentation, speech, robotics, clinical and car processing, photo and video processing, television, multi-media, radar, sonar.
Application-Driven structure Synthesis is of curiosity to either teachers and senior layout engineers and CAD managers in undefined. It offers an outstanding review of what services to anticipate from destiny functional layout instruments, and comprises an in depth bibliography.
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Extra resources for Application-Driven Architecture Synthesis
Int. Conf. on Acoustics, Speech and Signal Processing, Albuquerque, NM, pages 1057-1060, Apr 1990. 20 CHAPTER 1  G. Janssen. Hardware verification using temporal logic: a practical view. In L. Claesen, editor, Proc. 5 International Workshop on Applied Formal Methods for Correct VLSI Design, Houthalen, Belgium, pages 291-300. Elsevier, Amsterdam, Nov 1989.  G. de Jong. Verification of data flow graphs using temporal logic. In L. Claesen, editor, Proc. 5 International Workshop on Applied Formal Methods for Correct VLSI Design, Houthalen, Belgium, pages 301-310.
Synthesis methodologies for real-time controllers • "Controller synthesis and verification" This chapter addresses the performance-driven issues in high-level controller design. In particular, effective ways to decompose the controller architecture are presented. The effect of compiled cells on performancedriven technology mapping is also discussed. Finally, it provides results on formal verification aspects in a real-time context. 18 8 CHAPTER 1 CONCLUSION This book provides an overview of state-of-the-art work in the domain of behavioral and architectural synthesis for real-time processing applications.
The ports of the node correspond to the input and output nodes of the corresponding graph (see figure 4). Conditional statements A graph construct for a multiway conditional case statement is available, which is also used for representing simple if-then(-else) statements. The sub-graph which implements the test expression delivers a data token, whose value selects one of several subgraphs to be executed. This is implemented by branch and merge nodes, which route incoming tokens to one of the subgraphs, and gather the tokens again to a common output for later use (see figure 5).